1. Field of the Invention
The present invention generally relates to an interconnect structure and method for forming the same. Specifically, among other things, the present invention provides an interconnect structure in which a gouge can be formed in a via of the interconnect structure without causing trench damage.
2. Related Art
As millions of devices and circuits are squeezed onto a semiconductor chip, the wiring density and the number of metal levels are increased generation after generation. In order to provide low RC for high signal speed, low-k dielectric and copper lines become necessary. The quality of thin metal wirings and studs formed by the Damascene process is extremely important to ensure yield and reliability. One major problem encountered in this area today is poor mechanical integrity of deep submicron metal studs embedded in low-k dielectric, which can cause unsatisfied thermal cycling and stress migration resistance in BEOL interconnects.
To solve this weak mechanical strength issue while employing copper Damascene and low-k dielectric in the Back End of the Line (BEOL), a so called “via punch-through” or gouging technique has been adopted by the semiconductor industry. Such a via-gouging feature was reported to achieve a reasonable contact resistance. It also increases the mechanical strength of the contact studs. However, the gaseous (e.g., Argon) sputtering that is often used to create gouging also causes roughness at the bottom of the trench(s) formed in the low-k material. Such damage becomes a major yield detractor and reliability concern. This problem becomes more severe when ultra low-k (ULK) dielectric material is used (e.g., porous low-k dielectrics).
Specifically, after contact and wire patterning is performed using the dual Damascene process, a common pre-cleaning step to remove native copper oxide is an non-selective, directional argon sputtering. It is recommended to use aggressive Argon bombardment to create the via-gouging feature. An undesirable side-effect of Argon bombardment is damage to the bottom of the trenches. Referring to FIG. 1a, after Dual Damascene patterning, both wiring 10 and via 12 patterns are formed in the low-k dielectric layer 14. At this point, a bottom level of metal wiring 16 (e.g., copper) is revealed.
As shown in FIG. 1b, after feature surfaces are coated with a liner material 18, Argon sputtering is carried out to clean the surface of the structure and form a gouge 20 into level of metal wiring 16 to enhance the interconnect mechanical strength. At this point, as shown in FIG. 1c, damage 22 is exhibited at the bottom of the trenches 10 due to the effect of aggressive sputtering. In general, the damage layer depth “h” is >20 nm. Irrespective of this damage, the prior practice has been to continue the process as shown in FIG. 1d by depositing liner 24, and then to perform metallization and Chemical-Mechanical Polishing (CMP) to produce level of metal wiring 26 as shown in FIG. 1e. 
This feature-bottom-roughness damage 22 exhibited by this practice reduces the diffusion barrier quality and degrades the overall wiring reliability or produces a high-level of metal-to metal leakage. It is believed that during argon sputtering not only damages the low-k material, but also sputters copper and metallic liner material which eventually embedded inside the roughened surface regions.
A SEM cross-sectional diagram 30 of the BEOL with copper interconnects in dense low-k dielectric is shown in FIG. 2a. Specifically, diagram 30 shows feature-bottom-roughness damage 22 of approximately 40 nm. A ULK dielectric has been adopted as a BEOL inter-level-dielectric material in most advanced semiconductor products. As compared to dense low-k ILD, the damage impact of gaseous bombardment is much higher on most ULK dielectrics, which makes integration of the current metallization approach with ULK dielectrics impossible. A SEM cross-sectional diagram 32 of the BEOL with copper interconnects in a ULK dielectric is shown in FIG. 2b. As can be seen, the damage in a ULK dielectric (e.g., approximately 90 nm) is even higher than the low-k dielectric of FIG. 2a. 